Subject description - AD4M34ISC

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AD4M34ISC Systems on Chip
Roles:PO, V Extent of teaching:14KP+6KC
Department:13134 Language of teaching:CS
Guarantors:  Completion:Z,ZK
Lecturers:  Credits:6
Tutors:  Semester:L


Main responsibilities of integrated circuits designer; design abstraction levels - Y chart. Specification designation, feasibility study, criteria for technology and design kits selection. Analogue and digital integrated systems design and simulation methodologies. Main features of application specific ICs - full custom design, gate arrays, standard cells, programmable array logic. Design aspects mobile and low power systems. Hardware Description languages (HDL). Logic and physical synthesis. Frond End and Back End design. Floorplanning, place and route, layout, parasitic extraction, time analysis, testbenche construction and verification.

Course outlines:

1. Main tasks of analogue and digital integrated circuits designer; design methodologies (top down, bottom up), design abstraction levels - Y chart.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.

Exercises outline:

1. CADENCE design system
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.


Michael Smith: Application-Specific Integrated Circuits, Addison-Wesley, 1998
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog
Integrated Circuits, John Wiley and Sons, 2000
E. Sinencio, A. Andreou: Low-Voltage/Low-Power Integrated Circuits and
Systems, John Wiley and Sons, 1998 Mark Zwolinski : Digital System Design and VHDL , Prentice-Hall, 2000




System on Chip, IC Design

Subject is included into these academic programs:

Program Branch Role Recommended semester
MKEEM1 Technological Systems V 2
MKEEM5 Economy and Management of Electrical Engineering V 2
MKEEM4 Economy and Management of Power Engineering V 2
MKEEM3 Electrical Power Engineering V 2
MKEEM2 Electrical Machines, Apparatus and Drives V 2
MKKME1 Wireless Communication V 2
MKKME5 Systems of Communication V 2
MKKME4 Networks of Electronic Communication V 2
MKKME3 Electronics V 2
MKKME2 Multimedia Technology V 2
MKOI2 Computer Engineering PO 2
MKKYR4 Aerospace Systems V 2
MKKYR1 Robotics V 2
MKKYR3 Systems and Control V 2
MKKYR2 Sensors and Instrumentation V 2

Page updated 5.8.2021 19:52:16, semester: L/2021-2, L/2020-1, Z,L/2022-3, Z/2021-2, Send comments about the content to the Administrators of the Academic Programs Proposal and Realization: I. Halaška (K336), J. Novák (K336)