"The main motivation for our projects is that we have been teaching computer architecture for decades. So we try to show the basic simplest principle of why a processor is actually able to execute an instruction, a program," said Dr. Píša.
The development of the current open architecture RISC-V dates back to the 1980s, when researchers at Stanford and Berkeley, including Prof. David Patterson and his team, proposed a concept for increasing the performance of processor cores called RISC. The design of the system differed from the then-disadvantageous trend of complicating already complex processors. "The RISC concept was gradually adopted in the 'bottom layer' by all other companies," Dr. Píša noted, adding that it went on to produce the highly successful MIPS and SPARC architectures used in the Internet, film animation, 3D graphics, and other technologies. However, it was the commercialization of downstream processors and the fact that companies owned the rights to them that meant that while the original creators of RISC could conduct research on their architecture, it was not possible to monetize it or to establish collaborations with independent companies that would use their RISC. The concept had also become outdated and, according to Dr. Píša, there was therefore a demand for a new generation, unencumbered by the limitations of the previous one.
Krste Asanovic, Patterson's student and current professor at UC Berkeley, began working on the design of the new RISC-V architecture between 2005 and 2008. "To develop the project, he founded SiFive, a company that Intel now buys from," Dr. Píša noted. He pointed out that RISC-V is also based on the premise that it is advantageous to join forces to design a more generic base, and make optimizations, customizations, and extensions for different target applications on top of it, rather than developing a processor for each area "from scratch." "In addition to designing architectures for teaching and scientific research, RISC-V makes it possible to create application-specific architectures (Domain Specific Architectures) more efficient, easier, and without wasting energy or money," explained the expert. In this context, Dr. Píša stressed that it is therefore essential that students learn to use RISC-V well.
However, it was also necessary that RISC-V could not be blocked through exclusive rights and patents by some companies. "To ensure that collaboration and development are assured up front, the RISC-V project has special, though otherwise very loose, conditions. Standardization and development are currently taking place within RISC-V International, a company based in Switzerland. The latter guarantees independence and its rules are also such that whoever wants to contribute to the specification and development must commit that what they propose in the working groups and contribute to the architecture will never be blocked by a patent and other restrictions," described Dr. Píša, who, in his words, has been interested in CTU's membership in RISC-V International for a very long time. "It gives us access to these expert groups where we can share our teaching materials, and ideas and at the same time, top scientists and IT professionals learn about our university," the expert highlighted some of the benefits.
According to Pavel Píša, experts from CTU joined the Academic and Training Special Interest Group (ATSIG) immediately after joining the organization. "We also joined the SIG Automotive group, where we can offer 30 years of experience with relevant communication buses, deployment, and building of GNU/Linux real-time control systems. My proposal to add RTEMS, which is used for ESA and NASA space missions, and NuttX, which is so far used for drone autopilots or headsets, to the group of operating systems under consideration has already been accepted. With the students, we contribute to the kernels of all these named operating systems, among others," continued Dr. Píša, "For example, for the ESP32C3 chips with RISC-V architecture, we have added a peripheral driver for accessing the automotive bus to the main NuttX system tree," added the expert.
Our student-designed learning simulator is referenced by universities around the world
According to Dr. Píša, the educational simulator he is developing with his students from FEL CTU is also finding application in the international professional community. He recalled that it all started with the thesis of a former student, Karel Kočí, who designed the simulator in 2018. "The QtMips simulator was first used in teaching a year later. In 2020, at the time of enforced distance learning, it was then used to its full potential, including in a web browser," said Dr. Píša. "However, this was a version based on the MIPS architecture, which, although it was at the birth of 3D graphics (SGI, OpenGL) and served for decades as the most suitable teaching model, is now obsolete and its use is complicated by patents and unclear ownership," the expert explained.
Later, other FEE students who wanted to develop the project came forward - Jakub Dupák and Max Hollmann. "Jakub Dupák continues to work on the development under my guidance and I am also contributing to this project. We deployed the QtRvSim simulator in the summer semester of 2022, so at the moment we are teaching on the RISC-V architecture," said Dr. Píša.
And the simulator has already had several international presentations. Dr. Píša described that Jakub Dupák presented it last year at the Embedded World Conference 2022 in a session opened by Calista Redmond, president of RISC-V international. He was also featured in the RISC-V project working group. It was also presented live by FEE representatives at the beginning of February this year at the FOSDEM 2023 conference at the Free University of Brussels. Dr. Píša pointed out that besides a good reputation, such an event is also a great opportunity for students to network and enter the "big world" of IT. "Jakub Dupák, thanks to contacts and demonstrating his expertise at last year's conference, was involved in the development of a compiler for the now highly followed RUST programming language, and this year at the FOSDEM conference he met developers from the relevant group around the GNU compiler project live," described Dr. Píša.
Regarding future plans, the expert said that the RISC-V architecture has already become a standard in computer architecture courses at leading universities worldwide and the QtRvSim simulator offers a suitable teaching tool. "Our materials and simulators are already being referred to by teachers at the University of Colorado at Colorado Springs, University of Porto, University of Montréal, Institute of Computing at the State University of Campinas, and Graz University of Technology, for example," said Dr. Píša. An older version of MIPS is also used at the Faculty of Mathematics and Physics at Charles University, he said and has been extended for their needs at the National and Kapodistrian University of Athens.
"We would be very pleased if our simulator would become a standard tool for teaching processor architectures worldwide if other students and experts would get involved in its development, and if prestigious textbooks around the world would start referring to it," added Dr. Píša. According to him, CTU's involvement in the RISC-V International organization also offers great opportunities to access projects of leading universities and experts as well as companies in the IT world. "The offer of development and often interestingly paid projects and internships for students is also interesting," the expert concluded.
