prof. Ing. Jiří Jakovenko, Ph.D.

Design of analog integrated systems focused on the analog IC blocks improvement, especially power consumption and system thermal management. The issue of this topic can be extended by investigation of the encapsulated chips reliability, modeling of integrated systems reliability and life-time, system thermal management of ICs and MEMS structures. Development approach has character of the electronics system design in Cadence design environment and perfection of circuit parameters; evolving of new methodologies for the calculation and evaluation of lifetime; modeling of thermo-mechanical properties of encapsulated electronics systems using ANSYS or CoventorWare. www.micro.fel.cvut.cz

The analog design of integrated circuits is now hand-designed and extensive designer experience is required. A very interesting alternative for automating the circuit topology design process may be to develop a method based on machine learning techniques that would allow the process of physical design synthesis of an analog circuit to be improved. The aim of this PhD thesis is to develop a methodology for automated physical synthesis of analog circuits based on machine learning methods. In solving this topic, we assume cooperation with ST Microelectronics, which has a comprehensive database of integrated circuit topologies, on which machine learning will be tested.

The proposed thesis is dedicated to developing dedicated readout electronics for the latest chips of the Timepix series, Timepix2 & Timepix4. The development will profit from existing electronics for Timepix3 (HardPix series), but must face challenges arising from the novel chip technology and environmental constraints in space. Detector-specific challenges, such as high data rates produced during operation, require innovative on-board processing for data reduction & compression to comply with the strict downlink capability of typical space missions. Moreover, operational parameters of the not-yet well understood chips have to be determined, and the influence of temperature fluctuation on detector operation needs to be assessed and mitigated. Within the thesis, the student will face and solve the following tasks: • Design of space-ready readout electronics based on radiation-hard COTS components of their space equivalent • Functional testing and performance validation • Evaluation of the impact of space environment parameters on electronics performance (thermal-vacuum, shock, vibrations…) • Development of interfaces for application on different satellites or balloon flights • Development of firmware for on-board data filtering, classification, or analysis The chip technology and development done during the project are novel and publishable.

The aim of the work is to design and experimentally verify the architecture of an integrated environmental sensing system that will enable robust estimation of monitored quantities despite limited sensor selectivity, drift, and variable operating conditions. The solution procedure will include an analysis of the properties of the selected class of sensors and identification of the main sources of uncertainty, in particular drift, cross-sensitivity and the influence of ambient conditions. Based on this analysis, a system architecture will be designed including control of sensor operating conditions, an optimised measurement chain and structured signal processing. The design will include the creation of a parametric model of the measurement chain that captures nonlinearities, dynamics, and noise. This model will be used to design measurement modes, simulate system behaviour, and support the design of data processing algorithms. In parallel, signal processing methods and machine learning models will be designed to solve the inverse task of estimating monitored quantities. An important part will be the design of a feedback loop using a parametric model for output validation, reliability estimation, and adaptive correction of input data. This loop will allow partial drift compensation and support continuous system calibration. The proposed architecture will be verified in the form of a proof-of-concept implementation using available sensors, an analogue front-end and a digital platform (MCU/FPGA). The long-term goal is to assess the possibility of integrating the system into a compact solution, possibly in the form of an integrated circuit. The evaluation will be performed based on metrics including selectivity, stability over time, robustness to changes in operating conditions and calibration requirements. The proposed approach will be compared with conventional methods based on static measurement and separate data processing.